Device Usage Page (device_usage_statistics.html)

This HTML page displays the device usage statistics that will be sent to Xilinx. The file also contains predefined XML tags used to simplify processing.
 
Please verify the contents are okay to send to Xilinx!
 
 
Software Version and Target Device
Product Version: ISE:11.3 (WebPack) Target Family: spartan3e
OS Platform: LIN Target Device: xc3s500e
Project ID (random number) dce2c8b5ef864f57bdd45a4afaea26cd.d8723796e7ff4d0db84723dd56f880ca.10 Target Package: fg320
Registration ID e Target Speed: -4
Date Generated Mon Nov 28 13:53:37 2011
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=21
  • 10-bit adder=1
  • 11-bit adder=3
  • 11-bit adder carry out=2
  • 12-bit adder=4
  • 12-bit adder carry out=2
  • 12-bit subtractor=1
  • 8-bit adder=7
  • 9-bit adder=1
 Registers=580
  • Flip-Flops=580
 Xors=2
  • 32-bit xor2=1
  • 8-bit xor2=1
 Counters=14
  • 10-bit up counter=1
  • 11-bit up counter=4
  • 12-bit up counter=1
  • 13-bit up counter=1
  • 16-bit up counter=1
  • 20-bit up counter=4
  • 3-bit up counter=1
  • 5-bit up counter=1
 Comparators=14
  • 11-bit comparator equal=1
  • 11-bit comparator greatequal=2
  • 11-bit comparator lessequal=1
  • 12-bit comparator equal=6
  • 12-bit comparator greatequal=1
  • 13-bit comparator equal=1
  • 13-bit comparator not equal=1
  • 4-bit comparator equal=1
 		MiscellaneousStatistics
  • AGG_BONDED_IO=149
  • AGG_IO=149
  • AGG_SLICE=896
  • NUM_4_INPUT_LUT=1064
  • NUM_BONDED_IBUF=42
  • NUM_BONDED_IOB=107
  • NUM_BUFGMUX=12
  • NUM_CYMUX=360
  • NUM_IOB_FF=5
  • NUM_LUT_RT=250
  • NUM_RAMB16=2
  • NUM_SLICEL=896
  • NUM_SLICE_FF=772
  • NUM_XOR=298
  • Xilinx Core blk_mem_gen_v3_3, Xilinx CORE Generator 11.3=2
  • Xilinx Core dist_mem_gen_v4_2, Xilinx CORE Generator 11.3=1
 		NetStatistics
  • NumNets_Active=1874
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BRAMADDR=44
  • NumNodesOfType_Active_BRAMDUMMY=34
  • NumNodesOfType_Active_CLKPIN=442
  • NumNodesOfType_Active_CNTRLPIN=455
  • NumNodesOfType_Active_DOUBLE=3725
  • NumNodesOfType_Active_DUMMY=3059
  • NumNodesOfType_Active_DUMMYBANK=36
  • NumNodesOfType_Active_DUMMYESC=31
  • NumNodesOfType_Active_GLOBAL=176
  • NumNodesOfType_Active_HFULLHEX=53
  • NumNodesOfType_Active_HLONG=6
  • NumNodesOfType_Active_HUNIHEX=256
  • NumNodesOfType_Active_INPUT=3893
  • NumNodesOfType_Active_IOBOUTPUT=26
  • NumNodesOfType_Active_OMUX=1522
  • NumNodesOfType_Active_OUTPUT=1670
  • NumNodesOfType_Active_PREBXBY=1378
  • NumNodesOfType_Active_VFULLHEX=152
  • NumNodesOfType_Active_VLONG=33
  • NumNodesOfType_Active_VUNIHEX=314
  • NumNodesOfType_Gnd_BRAMDUMMY=8
  • NumNodesOfType_Gnd_DOUBLE=18
  • NumNodesOfType_Gnd_INPUT=96
  • NumNodesOfType_Gnd_OMUX=81
  • NumNodesOfType_Gnd_OUTPUT=61
  • NumNodesOfType_Gnd_PREBXBY=28
  • NumNodesOfType_Vcc_BRAMDUMMY=4
  • NumNodesOfType_Vcc_CNTRLPIN=12
  • NumNodesOfType_Vcc_INPUT=51
  • NumNodesOfType_Vcc_PREBXBY=30
  • NumNodesOfType_Vcc_VCCOUT=48
 SiteStatistics
  • IBUF-DIFFM=6
  • IBUF-DIFFMI=6
  • IBUF-DIFFS=4
  • IBUF-DIFFSI=8
  • IBUF-IOB=4
  • IOB-DIFFM=50
  • IOB-DIFFS=48
  • SLICEL-SLICEM=387
 		SiteSummary
  • BUFGMUX=12
  • BUFGMUX_GCLKMUX=12
  • BUFGMUX_GCLK_BUFFER=12
  • IBUF=42
  • IBUF_INBUF=42
  • IBUF_PAD=42
  • IOB=107
  • IOB_INBUF=8
  • IOB_OFF1=5
  • IOB_OUTBUF=107
  • IOB_PAD=107
  • RAMB16=2
  • RAMB16_RAMB16=2
  • RAMB16_RAMB16A=2
  • RAMB16_RAMB16B=2
  • SLICEL=896
  • SLICEL_C1VDD=36
  • SLICEL_C2VDD=19
  • SLICEL_CYMUXF=189
  • SLICEL_CYMUXG=171
  • SLICEL_F=588
  • SLICEL_F5MUX=58
  • SLICEL_FFX=376
  • SLICEL_FFY=396
  • SLICEL_G=476
  • SLICEL_GNDF=147
  • SLICEL_GNDG=146
  • SLICEL_XORF=153
  • SLICEL_XORG=145
 
Configuration Data
BUFGMUX
  • S=[S_INV:12] [S:0]
 BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:12]
  • S=[S_INV:12] [S:0]
 IBUF_PAD
  • IOATTRBOX=[SSTL2_I:2] [LVTTL:16] [LVCMOS33:24]
  • PULL=[PULLUP:8] [PULLDOWN:5]
 IOB
  • O1=[O1_INV:0] [O1:107]
  • OCE=[OCE:0] [OCE_INV:5]
  • OTCLK1=[OTCLK1_INV:5] [OTCLK1:0]
  • SR=[SR:5] [SR_INV:0]
  • T1=[T1_INV:8] [T1:0]
 IOB_OFF1
  • CE=[CE:0] [CE_INV:5]
  • CK=[CK:0] [CK_INV:5]
  • D=[D:5] [D_INV:0]
  • LATCH_OR_FF=[FF:5]
  • OFF1_INIT_ATTR=[INIT0:4] [INIT1:1]
  • OFF1_SR_ATTR=[SRLOW:4] [SRHIGH:1]
  • OFFATTRBOX=[ASYNC:5]
  • SR=[SR:5] [SR_INV:0]
 IOB_OUTBUF
  • IN=[IN_INV:0] [IN:107]
  • TRI=[TRI_INV:8] [TRI:0]
 IOB_PAD
  • DRIVEATTRBOX=[4:28] [6:6] [8:27] [12:22]
  • IOATTRBOX=[SSTL2_I:24] [LVTTL:7] [LVCMOS33:76]
  • SLEW=[SLOW:62] [FAST:21]
 RAMB16
  • CLKA=[CLKA_INV:0] [CLKA:2]
  • CLKB=[CLKB_INV:0] [CLKB:2]
  • ENA=[ENA_INV:0] [ENA:2]
  • ENB=[ENB_INV:0] [ENB:2]
  • SSRA=[SSRA_INV:0] [SSRA:2]
  • SSRB=[SSRB_INV:0] [SSRB:2]
  • WEA=[WEA:2] [WEA_INV:0]
  • WEB=[WEB:2] [WEB_INV:0]
 RAMB16_RAMB16A
  • CLKA=[CLKA_INV:0] [CLKA:2]
  • ENA=[ENA_INV:0] [ENA:2]
  • PORTA_ATTR=[2048X9:2]
  • SSRA=[SSRA_INV:0] [SSRA:2]
  • WEA=[WEA:2] [WEA_INV:0]
  • WRITEMODEA=[READ_FIRST:2]
 RAMB16_RAMB16B
  • CLKB=[CLKB_INV:0] [CLKB:2]
  • ENB=[ENB_INV:0] [ENB:2]
  • PORTB_ATTR=[2048X9:2]
  • SSRB=[SSRB_INV:0] [SSRB:2]
  • WEB=[WEB:2] [WEB_INV:0]
  • WRITEMODEB=[READ_FIRST:2]
 SLICEL
  • BX=[BX_INV:14] [BX:326]
  • BY=[BY:281] [BY_INV:15]
  • CE=[CE:248] [CE_INV:31]
  • CIN=[CIN_INV:0] [CIN:160]
  • CLK=[CLK:204] [CLK_INV:229]
  • SR=[SR:102] [SR_INV:56]
 SLICEL_CYMUXF
  • 0=[0:189] [0_INV:0]
  • 1=[1_INV:0] [1:189]
 SLICEL_CYMUXG
  • 0=[0:171] [0_INV:0]
 SLICEL_F5MUX
  • S0=[S0:58] [S0_INV:0]
 SLICEL_FFX
  • CE=[CE:223] [CE_INV:30]
  • CK=[CK:175] [CK_INV:201]
  • D=[D:362] [D_INV:14]
  • FFX_INIT_ATTR=[INIT0:354] [INIT1:22]
  • FFX_SR_ATTR=[SRLOW:354] [SRHIGH:22]
  • LATCH_OR_FF=[FF:376]
  • REV=[REV_INV:0] [REV:1]
  • SR=[SR:77] [SR_INV:45]
  • SYNC_ATTR=[ASYNC:301] [SYNC:75]
 SLICEL_FFY
  • CE=[CE:243] [CE_INV:31]
  • CK=[CK:179] [CK_INV:217]
  • D=[D:381] [D_INV:15]
  • FFY_INIT_ATTR=[INIT0:376] [INIT1:20]
  • FFY_SR_ATTR=[SRLOW:376] [SRHIGH:20]
  • LATCH_OR_FF=[FF:396]
  • REV=[REV_INV:0] [REV:2]
  • SR=[SR:93] [SR_INV:52]
  • SYNC_ATTR=[ASYNC:311] [SYNC:85]
 SLICEL_XORF
  • 1=[1_INV:0] [1:153]
 
Pin Data
BUFGMUX
  • I0=12
  • O=12
  • S=12
 BUFGMUX_GCLKMUX
  • I0=12
  • OUT=12
  • S=12
 BUFGMUX_GCLK_BUFFER
  • IN=12
  • OUT=12
 IBUF
  • I=42
  • PAD=42
 IBUF_INBUF
  • IN=42
  • OUT=42
 IBUF_PAD
  • PAD=42
 IOB
  • I=8
  • O1=107
  • OCE=5
  • OTCLK1=5
  • PAD=107
  • SR=5
  • T1=8
 IOB_INBUF
  • IN=8
  • OUT=8
 IOB_OFF1
  • CE=5
  • CK=5
  • D=5
  • Q=5
  • SR=5
 IOB_OUTBUF
  • IN=107
  • OUT=107
  • TRI=8
 IOB_PAD
  • PAD=107
 RAMB16
  • ADDRA10=2
  • ADDRA11=2
  • ADDRA12=2
  • ADDRA13=2
  • ADDRA3=2
  • ADDRA4=2
  • ADDRA5=2
  • ADDRA6=2
  • ADDRA7=2
  • ADDRA8=2
  • ADDRA9=2
  • ADDRB10=2
  • ADDRB11=2
  • ADDRB12=2
  • ADDRB13=2
  • ADDRB3=2
  • ADDRB4=2
  • ADDRB5=2
  • ADDRB6=2
  • ADDRB7=2
  • ADDRB8=2
  • ADDRB9=2
  • CLKA=2
  • CLKB=2
  • DIA0=2
  • DIA1=2
  • DIA2=2
  • DIA3=2
  • DIA4=2
  • DIA5=2
  • DIA6=2
  • DIA7=2
  • DIPA0=2
  • DOB0=2
  • DOB1=2
  • DOB2=2
  • DOB3=2
  • DOB4=2
  • DOB5=2
  • DOB6=2
  • DOB7=2
  • ENA=2
  • ENB=2
  • SSRA=2
  • SSRB=2
  • WEA=2
  • WEB=2
 RAMB16_RAMB16
  • ADDRA=2
  • ADDRB=2
  • DIA=2
  • DIB=2
  • DOA=2
  • DOB=2
 RAMB16_RAMB16A
  • ADDRA=2
  • ADDRA10=2
  • ADDRA11=2
  • ADDRA12=2
  • ADDRA13=2
  • ADDRA3=2
  • ADDRA4=2
  • ADDRA5=2
  • ADDRA6=2
  • ADDRA7=2
  • ADDRA8=2
  • ADDRA9=2
  • CLKA=2
  • DIA=2
  • DIA0=2
  • DIA1=2
  • DIA2=2
  • DIA3=2
  • DIA4=2
  • DIA5=2
  • DIA6=2
  • DIA7=2
  • DIPA0=2
  • DOA=2
  • ENA=2
  • SSRA=2
  • WEA=2
 RAMB16_RAMB16B
  • ADDRB=2
  • ADDRB10=2
  • ADDRB11=2
  • ADDRB12=2
  • ADDRB13=2
  • ADDRB3=2
  • ADDRB4=2
  • ADDRB5=2
  • ADDRB6=2
  • ADDRB7=2
  • ADDRB8=2
  • ADDRB9=2
  • CLKB=2
  • DIB=2
  • DOB=2
  • DOB0=2
  • DOB1=2
  • DOB2=2
  • DOB3=2
  • DOB4=2
  • DOB5=2
  • DOB6=2
  • DOB7=2
  • ENB=2
  • SSRB=2
  • WEB=2
 SLICEL
  • BX=340
  • BY=296
  • CE=279
  • CIN=160
  • CLK=433
  • COUT=171
  • F1=583
  • F2=434
  • F3=391
  • F4=303
  • G1=470
  • G2=328
  • G3=292
  • G4=234
  • SR=158
  • X=418
  • XB=6
  • XQ=376
  • Y=280
  • YQ=396
 SLICEL_C1VDD
  • 1=36
 SLICEL_C2VDD
  • 1=19
 SLICEL_CYMUXF
  • 0=189
  • 1=189
  • OUT=189
  • S0=189
 SLICEL_CYMUXG
  • 0=171
  • 1=171
  • OUT=171
  • S0=171
 SLICEL_F
  • A1=583
  • A2=434
  • A3=391
  • A4=303
  • D=588
 SLICEL_F5MUX
  • F=58
  • G=58
  • OUT=58
  • S0=58
 SLICEL_FFX
  • CE=253
  • CK=376
  • D=376
  • Q=376
  • REV=1
  • SR=122
 SLICEL_FFY
  • CE=274
  • CK=396
  • D=396
  • Q=396
  • REV=2
  • SR=145
 SLICEL_G
  • A1=470
  • A2=328
  • A3=292
  • A4=234
  • D=476
 SLICEL_GNDF
  • 0=147
 SLICEL_GNDG
  • 0=146
 SLICEL_XORF
  • 0=153
  • 1=153
  • O=153
 SLICEL_XORG
  • 0=145
  • 1=145
  • O=145
 
Tool Usage
Command Line History
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s500e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s500e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s500e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s500e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s500e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s500e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s500e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s500e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s500e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s500e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s500e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s500e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s500e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s500e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s500e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s500e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s500e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s500e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s500e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s500e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s500e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s500e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
XSLTProcess 1 1 0 0 0 0 0
_impact 249 239 0 0 0 0 0
arwz 19 19 0 0 0 0 0
bitgen 284 283 0 0 0 0 0
cpldfit 1 1 0 0 0 0 0
edif2ngd 36 36 0 0 0 0 0
hprep6 2 2 0 0 0 0 0
map 358 318 0 0 0 0 0
netgen 2 2 0 0 0 0 0
ngc2edif 10 10 0 0 0 0 0
ngcbuild 36 36 0 0 0 0 0
ngdbuild 385 385 0 0 0 0 0
par 315 310 3 0 0 0 0
taengine 1 1 0 0 0 0 0
trce 313 313 0 0 0 0 0
tsim 1 1 0 0 0 0 0
xawinfo 1 1 0 0 0 0 0
xst 615 610 0 0 0 0 0
 
Help Statistics
Search words with results
add core ( 1 ) bit file generation ( 1 )
compile core ( 1 ) core generator ( 1 )
fonts ( 1 ) global file ( 1 )
open core ( 1 )
Help files
/doc/usenglish/isehelp/ ( 1 ) /doc/usenglish/isehelp/cgn_c_df_compile_lib.htm ( 1 )
/doc/usenglish/isehelp/cgn_c_df_vhdl_instantiation_example.htm ( 1 ) /doc/usenglish/isehelp/cgn_p_add_ip_projnav_design.htm ( 1 )
/doc/usenglish/isehelp/cgn_p_adding_generated_ip_design_vhdl_flow.htm ( 1 ) /doc/usenglish/isehelp/cgn_p_starting_core_generator.htm ( 1 )
/doc/usenglish/isehelp/ise_c_overview.htm ( 2 ) /doc/usenglish/isehelp/ise_c_using_the_design_views.htm ( 1 )
/doc/usenglish/isehelp/ise_p_generate_cpld_programming_file.htm ( 1 ) /doc/usenglish/isehelp/ise_p_generate_fpga_programming_file.htm ( 1 )
/doc/usenglish/isehelp/ite_c_overview.htm ( 1 ) /doc/usenglish/isehelp/pim_p_loading_project_files.htm ( 1 )
/doc/usenglish/isehelp/pim_r_impactfiles.htm ( 1 ) /doc/usenglish/isehelp/pn_db_design_view_properties.htm ( 1 )
/doc/usenglish/isehelp/pn_db_npw_create_new_project.htm ( 1 ) /doc/usenglish/isehelp/pn_db_nsw_select_ip.htm ( 1 )
/doc/usenglish/isehelp/pn_db_nsw_select_source_type.htm ( 1 ) /doc/usenglish/isehelp/pn_r_design_panel.htm ( 1 )
/doc/usenglish/isehelp/pp_db_general_options.htm ( 1 ) /doc/usenglish/isehelp/pp_n_process_generate_programming_file.htm ( 1 )
/doc/usenglish/isehelp/pp_p_process_configure_target_device.htm ( 1 ) /doc/usenglish/isehelp/pp_p_process_update_bitstream_processor_data_xps.htm ( 1 )
/doc/usenglish/isehelp/pta_db_ttc-report-preferences-page.htm ( 1 ) /doc/usenglish/isehelp/rtv_c_rtl_files.htm ( 1 )
/doc/usenglish/isehelp/rtv_c_tech_files.htm ( 1 ) /doc/usenglish/isehelp/sse_db_obj_prop_figure_traits.htm ( 1 )
/doc/usenglish/isehelp/sse_p_creating_symbol_from_ngc.htm ( 1 ) /doc/usenglish/wizards/arwz/awz_db_dcmclkfreq.htm ( 1 )
/doc/usenglish/wizards/arwz/awz_db_dcmgen.htm ( 1 ) /doc/usenglish/wizards/arwz/awz_db_dcmviewbuf.htm ( 1 )
 
Project Statistics
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_Simulator=ISim (VHDL/Verilog)
PROP_Top_Level_Module_Type=HDL PROP_PreferredLanguage=VHDL
PROP_Enable_Message_Filtering=false PROP_Enable_Incremental_Messaging=false
PROP_UseSmartGuide=false Partitions count=1
FILE_COREGEN=2 FILE_COREGENISE=2
FILE_UCF=1 FILE_VHDL=3
PROP_DevDevice=xc3s500e PROP_DevFamily=Spartan3E
PROP_DevPackage=fg320 PROP_DevSpeed=-4
PROP_FitterReportFormat=HTML PROP_PreferredLanguage=VHDL
PROP_UserConstraintEditorPreference=Constraints Editor PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_lockPinsUcfFile=changed
Project duration(days)=24
 
Core Statistics
Core Type=blk_mem_gen_v3_3
c_addra_width=11 c_addrb_width=11 c_algorithm=1 c_byte_size=9
c_common_clk=0 c_default_data=0 c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0
c_has_ena=0 c_has_enb=0 c_has_injecterr=0 c_has_mem_output_regs_a=0
c_has_mem_output_regs_b=0 c_has_mux_output_regs_a=0 c_has_mux_output_regs_b=0 c_has_regcea=0
c_has_regceb=0 c_has_rsta=0 c_has_rstb=0 c_init_file_name=no_coe_file_loaded
c_inita_val=0 c_initb_val=0 c_load_init_file=0 c_mem_type=1
c_mux_pipeline_stages=0 c_prim_type=1 c_read_depth_a=2048 c_read_depth_b=2048
c_read_width_a=8 c_read_width_b=8 c_rst_priority_a=CE c_rst_priority_b=CE
c_rst_type=SYNC c_rstram_a=0 c_rstram_b=0 c_sim_collision_check=ALL
c_use_byte_wea=0 c_use_byte_web=0 c_use_default_data=0 c_use_ecc=0
c_wea_width=1 c_web_width=1 c_write_depth_a=2048 c_write_depth_b=2048
c_write_mode_a=READ_FIRST c_write_mode_b=READ_FIRST c_write_width_a=8 c_write_width_b=8
Core Type=dist_mem_gen_v4_2
c_addr_width=8 c_default_data=0 c_depth=256 c_has_clk=0
c_has_d=0 c_has_dpo=0 c_has_dpra=0 c_has_i_ce=0
c_has_qdpo=0 c_has_qdpo_ce=0 c_has_qdpo_clk=0 c_has_qdpo_rst=0
c_has_qdpo_srst=0 c_has_qspo=0 c_has_qspo_ce=0 c_has_qspo_rst=0
c_has_qspo_srst=0 c_has_spo=1 c_has_spra=0 c_has_we=0
c_mem_init_file=ROM.mif c_mem_type=0 c_pipeline_stages=0 c_qce_joined=0
c_qualify_we=0 c_read_mif=1 c_reg_a_d_inputs=0 c_reg_dpra_input=0
c_sync_enable=1 c_width=32