Development of the BST pad system

"PRO/A chip evaluation."

Together with our Norwegian colleagues we assembled an experimental setup and worked out a method for the ASIC tests. An independent series of calibration measurements was held for a few ASICs at DESY Zeuthen in the low-noise laboratory conditions. Then the whole data set from Oslo was renormalized. The IDE AS company sent us 203 tested ICs, but only 48 of them plus some spares had been chosen for the Pad detector. The yield of 25% made us possible to apply a rigorous cut.
  Bias voltages could be measured to a high precision. The data obtained had a regular structure correlated to the wafer's number and the chip position on it. The maximum deviation observed was in order of 10% indicating technological deficiencies.
  A signal-to-noise ratio (SNR) for every individual channel was chosen to define the ASIC's quality. The rejection power of the SNR-cut has a critical value and above it the number of accepted ICs decreases very rapidly. Therefore this method is good to reveal all those deffective devices with a high noise and (or) a small gain. The chip was refused, if at least one of its channels did not fulfill the SNR-criterion. An additional cut was applied accordingly to the best choice of the operating threshold voltage. The worst channel with the smallest gain and the largest noise thus, determines the common threshold for the whole chip. As higher the threshold to discriminate the same input signal, as more the detector is safe against the noise triggering. The positive outcome was nearly 83% (31% - perfect and 52% - good). About 4% did not pass the quality check and the remaining 13% had no reasonable data.
  There were two different computer systems used for the data acquisition: "Windows 98" in Oslo and "MacOS 8.0" at DESY Zeuthen. For both platforms, the "Microsoft Excel" framework provided a compatible data format. By this reason the evaluation chain was written in the "Visual Basic" programming language.

Pro/A chip (20X zooming)