This program includes a number of subroutines executed one by another in a single loop. After the last machine instruction is complete, the processor goes to the idle state and waits for a "wake up" signal which starts the next loop. Every procedure has a flag (one bit in the control register) to enable or disable its call. User may set or remove these flags and, hence, define the command sequence. Subprogram arguments, like threshold values, ASIC parameters etc., are kept in a random-access memory (RAM). Every time when the user changes the RAM content, a shaking signal for the processor is automatically generated. Another register contains an identifier code which is unique for any new system configuration. This word is added to the H1 event database. The design entry code was written in the VHDL programming language and compiled in the "MaxPlus II" software package.