[Hvcmos] Fwd: CERN Detector Seminar - Friday 6 December - 11:00 - 40/S2-D01 (Salle Dirac)

Jan Hammerich jhammerich at hep.ph.liv.ac.uk
Tue Dec 3 15:50:06 GMT 2024


FYI, in case you didn't get the invite.


-------- Forwarded Message --------
Subject: 	CERN Detector Seminar - Friday 6 December - 11:00 - 40/S2-D01 
(Salle Dirac)
Date: 	Mon, 2 Dec 2024 14:27:51 +0000
From: 	EP Seminars and Colloquia <EP-seminars.colloquia at cern.ch>
To: 	EP-Seminars-announcement (People interested in EP Seminars and 
Colloquia) <EP-Seminars-announcement at cern.ch>



Dear all,

In the next EP Detector Seminar, we will have a presentation on the 
following topic: *CMOS Monolithic Active Pixel Sensors: challenges and 
perspectives*

Itwill be given on *Friday,**6 December at 11:00 *in 
room*4**0/S2-D01(Salle Dirac)*

Connection details are given on the indico 
page:https://indico.cern.ch/event/1461789/

_Title and Speaker_:

*CMOS Monolithic Active Pixel Sensors: challenges and perspectives*

*by Walter Snoeys (CERN)*

_Abstract_:

CMOS cameras revolutionized the visible imaging world, and now move into 
other fields.  CMOS Monolithic Active Pixel Sensors (CMOS MAPS) have 
been successfully used in the STAR experiment and are now taking data in 
the 10 m2 Inner Tracker System (ITS2) of the ALICE experiment at CERN. 
CMOS MAPS in high energy physics (HEP) continue to be the object of 
intense research and development, for instance in EP R&D WP1.2 and DRDs, 
and for future ALICE and LHCb upgrades­, and detectors at FCC.  CMOS 
MAPS for HEP face very different requirements, but their development 
greatly benefits from the progress of CMOS imagers for visible light, 
the integration offered by stitching and wafer stacking, as well as 
trends in mainstream CMOS.

3D wafer stacking and stitching are now well established for CMOS 
sensors for visible light, and stacking is also now intensely pursued in 
mainstream CMOS. Advances in CMOS technology bring pixel pitches well 
below 10 micron for HEP within reach, significant radiation tolerance, 
increased resolution of our measurements and potential impact in other 
fields.  The development requires expertise in digital-on-top design and 
design verification to deal with the increasing circuit complexity, and 
expertise in devices and technology supported by TCAD and Monte Carlo 
simulations for sensor optimization. Design for yield, lower power 
densities reducing on-chip resistive drops, together with efficient 
volume test, assembly, and mounting, will be enablers for large area 
detectors and larger production volumes. This presentation will try to 
give an overview.

_Organized by_: Michael Campbel

/Coffee will be served at 10:30/

Kind regards,

CERN, EP Department

Seminars and Colloquia Secretariat
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