Development of HV-CMOS sensors for the HL-LHC Upgrade and Future Experiments

High Voltage-CMOS (HV-CMOS) technologies were developed to handle high voltages for driving displays, motors, MEMS and many other devices, while retaining the leading edge performance and low-cost low-complexity fabrication process of commercial CMOS technologies. In spite of this, there is a strong effort at present time in the high energy physics community to exploit the industry standard HV-CMOS technology to develop a new generation of position sensitive detectors. Tracker detectors in HV-CMOS technologies are unique as they offer fast signal collection and high radiation tolerance, achieved by means of high bias voltages applied to the bulk substrate material to create a wide depletion region, and advanced processing CMOS electronics embedded within the sensing area. To further increase the depletion region and thus improve the Signal-to-Noise Ratio (SNR) of the sensor, wafers with high substrate resistivities can be used. These detectors, also known as HV-Monolithic Active Pixel Sensors (HV-MAPS), are able to meet the extreme demands of future experiments in particle physics, such as the ATLAS inner tracker upgrade, the Mu3e experiment and the future linear colliders ILC and CLIC.

In this seminar, I will give a general overview of HV-CMOS sensors. I will explain how these detectors can be implemented in industry standard HV-CMOS technologies and their main features in easily comprehensible terms to the non-expert. I will also comment the principal results achieved within the Liverpool HV-CMOS development programme.