Module72-R-150207_1420.img
Module72-Phi-150207_1420.img
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R-glued |
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Module-120 Logfile - STAGE 1 Entered by smithy at 04:45:42 PM 24/10/06 ----------------- Module 120 entry added to data base. Associated with Substrate 94 Thickness Max 0.968 Min 0.934 Deviations A -0.101 / B 0.008 / C -0.085 r-side Hybrid circuit added. p-side Hybrid circuit added. Substrate link to module updated. Visual Inspection Comment: -------------------------- ok ======================================================================== Module-120 Logfile - STAGE 2 Entered by gdp at 10:56:55 AM 25/10/06 -------------------------- Thickness measurements at chip locations ---------------------------------------- Thickness at chip pos 00 is 1.44 Thickness at chip pos 01 is 1.45 Thickness at chip pos 02 is 1.46 Thickness at chip pos 03 is 1.47 Thickness at chip pos 04 is 1.48 Thickness at chip pos 05 is 1.47 Thickness at chip pos 06 is 1.48 Thickness at chip pos 07 is 1.49 Thickness at chip pos 08 is 1.50 Thickness at chip pos 09 is 1.48 Thickness at chip pos 10 is 1.50 Thickness at chip pos 11 is 1.51 Thickness at chip pos 12 is 1.52 Thickness at chip pos 13 is 1.49 Thickness at chip pos 14 is 1.49 Thickness at chip pos 15 is 1.49 Average of thickness measurements at chip locations 1.4825 ======================================================================== Module-120 Logfile - STAGE 3 Entered by gdp at 11:07:10 AM 25/10/06 -------------------------- Phi and R side Metrology data: ----------------------------- On arrival. 4th corner deviation .230 M120_p_height.CSV uploaded. Longitudinal Analysis M120_r_height.CSV uploaded. Longitudinal Analysis M120_r_twist.CSV uploaded. Height Analysis ======================================================================== Module-120 Logfile - STAGE 4 Entered by gdp at 11:07:25 AM 25/10/06 -------------------------- Module 120 sent for population updated to Stage 4 ======================================================================== Module-120 Logfile - STAGE 5 Entered by geoff at 12:11:48 PM 24/11/06 -------------------------- Received after polpulation: ======================================================================== Module-120 Logfile - STAGE 5 Entered by geoff at 11:51:48 AM 27/11/06 -------------------------- Electrical test of components PASSED ======================================================================== Module-120 Logfile - STAGE 6 Entered by affolder at 05:26:32 PM 29/11/06 -------------------------- Comments from visual inspection after population: Cleaned by Tony A. Inspected by Geoff S. ======================================================================== Module-120 Logfile - STAGE 7 Entered by affolder at 05:27:23 PM 29/11/06 -------------------------- Phi and R side Metrology data: ----------------------------- After population. 4th corner deviation 0.136 M120_p_height2.CSV uploaded. Longitudinal Analysis M120_r_height2.CSV uploaded. Longitudinal Analysis M120_r_twist2.CSV uploaded. Height Analysis ======================================================================== Authorisation - Entered by affolder at 05:28:00 PM 29/11/06 ------------- Authorisation given to proceed with PA and chip gluing Module has been set as PASS ======================================================================== Module-120 Logfile - STAGE 8 Entered by mpw at 01:01:18 PM 2/12/06 -------------------------- Following R-type Pitch Adaptors glued ---------------------------------------- PA-177-R1 PA-152-R2 PA-180-R3 PA-185-R4 ======================================================================== Module-120 Logfile - STAGE 9 Entered by mpw at 01:01:47 PM 2/12/06 -------------------------- Following P-type Pitch Adaptors glued ---------------------------------------- PA-178-P1 PA-180-P2 PA-179-P3 PA-189-P4 ======================================================================== Module-120 Logfile - STAGE 10 Entered by mpw at 01:08:43 PM 2/12/06 --------------------------- Place R-side chips Chip C1R8 position 0 on hybrid R-120 updated Chip C2R8 position 1 on hybrid R-120 updated Chip C3R9 position 2 on hybrid R-120 updated Chip C5R9 position 3 on hybrid R-120 updated Chip C6R9 position 4 on hybrid R-120 updated Chip C7R8 position 5 on hybrid R-120 updated Chip C-1R9 position 6 on hybrid R-120 updated Chip C-1R10 position 7 on hybrid R-120 updated Chip C1R10 position 8 on hybrid R-120 updated Chip C0R0 position 9 on hybrid R-120 updated Chip C2R0 position 10 on hybrid R-120 updated Chip C3R0 position 11 on hybrid R-120 updated Chip C4R1 position 12 on hybrid R-120 updated Chip C3R1 position 13 on hybrid R-120 updated Chip C4R2 position 14 on hybrid R-120 updated Chip C3R2 position 15 on hybrid R-120 updated ======================================================================== Module-120 Logfile - STAGE 11 Entered by mpw at 01:13:09 PM 2/12/06 --------------------------- Place P-side chips Chip C5R5 position 0 on hybrid P-120 updated Chip C4R5 position 1 on hybrid P-120 updated Chip C-4R6 position 2 on hybrid P-120 updated Chip C-5R5 position 3 on hybrid P-120 updated Chip C-4R5 position 4 on hybrid P-120 updated Chip C-3R5 position 5 on hybrid P-120 updated Chip C-2R5 position 6 on hybrid P-120 updated Chip C-1R5 position 7 on hybrid P-120 updated Chip C0R5 position 8 on hybrid P-120 updated Chip C1R5 position 9 on hybrid P-120 updated Chip C2R5 position 10 on hybrid P-120 updated Chip C3R5 position 11 on hybrid P-120 updated Chip C-1R6 position 12 on hybrid P-120 updated Chip C0R6 position 13 on hybrid P-120 updated Chip C1R6 position 14 on hybrid P-120 updated Chip C2R6 position 15 on hybrid P-120 updated ======================================================================== Module-120 Logfile - STAGE 12 Entered by mwhitley at 03:28:08 PM 6/12/06 -------------------------- Backend Bond r-side Comment: ---------------------------- Bonded on 8090 ======================================================================== Module-120 Logfile - STAGE 13 Entered by mwhitley at 03:28:43 PM 6/12/06 -------------------------- Backend Bond p-side Comment: ---------------------------- Bonded on 8090 Problems with following 1 bond wires: __________________________________ Bond | Chip | RefNum | Pin Name | ---------------------------------- 598 7 206 VddaTx ======================================================================== Module-120 Logfile - STAGE 14 Entered by huse at 03:57:36 PM 6/12/06 -------------------------- Electrical Test Comment: ---------------------------- R Chips PASS Phi Chips PASS
| R chips NOISE PEDESTAL | P chips NOISE PEDESTAL |
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| R chips NOISE PEDESTAL | P chips NOISE PEDESTAL |
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| R chips NOISE PEDESTAL | P chips NOISE PEDESTAL |
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| R chips problem bonds | P side problem bonds | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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| Total bad r bonds 10 | Total bad p bonds 5 |
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Comment - Entered by affolder at 03:26:00 PM 15/02/07
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Phi-side prior to shipment
Picture caption: Phi-side prior to shipment
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Module-120 Logfile - STAGE 30 Entered by gdp at 05:47:36 PM 15/02/07
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Burn-In Test Comment:
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Tcenter was -18C and the average Tsilicon was -7C
Bad channel lists verified.
Total problem R channels 10 (9 dead / 1 problematic)
Total problem P channels 6 (6 dead / 0 problematic)
| Data | R time | P time |
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| Noise | 150207_1414 | 150207_1416 |
| Raw R-side thermograph data. Module72-R-150207_1420.img |
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| Raw P-side thermograph data. Module72-Phi-150207_1420.img |
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